FET Biasing Basics

DC biasing of FETs is done to produce the required gate-to-source voltage (V_GS ) in order to get the desired value of drain current (I _D). The biasing circuits should maintain the drain current and the drain-source voltage within reasonable limits even for the maximum and minimum values of FET parameters.

Phenomenon of thermal runaway does not occur in FETs.

There are three biasing configurations used with JFETs, namely, the common-source, common-drain and common-gate configurations.