Clamper Circuits

  • What is a clamper circuit?

    Clamper circuits are used to clamp either positive or negative extremities of an AC signal to zero. These are also called as DC restorer circuits. In other words, a clamper circuit acts on an AC waveform, sinusoidal or non-sinusoidal, and gives it a DC level and does not alter the wave shape. It is an important building block of voltage-multiplying circuits.

  • Name the two types of clamper circuits?

    Two types of clamper circuits are
    • Negative clamper
    • Positive clamper

  • What is a negative clamper?

    Negative clamper circuit clamps the positive peaks of the AC input signal to zero.

  • Draw the circuit diagram of a negative clamper circuit?

    Figure below shows the circuit of a negative clamper circuit.

    Negative clamper circuit

  • Draw the output of a negative clamper circuit when a sinusoidal waveform is applied at its input?

    Figure below shows the input and the output waveforms for the negative clamper circuit of Q4 when the input signal applied is a sinusoidal signal.

    Input and output waveforms of a negative clamper circuitInput and output waveforms of a negative clamper circuit

    The circuit functions as follows.
    • As the input vi rises towards the positive peak Vm from zero in the first quarter of the cycle, capacitor (C) charges to Vm through the forward-biased diode.
    • The overall charging resistance is sum of source resistance (Rs) (not shown in the figure) and the parallel combination of R and diode’s forward resistance (Rf). If R is much larger than Rf then the capacitor C charges with a time constant of [(Rs + Rf) C].
    • C should be such that it charges to Vm in a time which in no case is greater than one-fourth of the time period of the input waveform. The total charging time may be considered to be equal to five times the time constant.
    • When the input starts decreasing, the diode becomes reverse-biased. The capacitor now tends to discharge through resistor R.
    • If the time constant (RC) is much larger than the time period of the input waveform, the discharge of the capacitor is negligible. Therefore, the voltage across the capacitor remains constant at the maximum value of the input signal.
    • Output at any instant of time is then equal to algebraic sum of input voltage and voltage across the capacitor. Thus, all positive peaks (Vm) are clamped to zero and all negative peaks (–Vm) go to –2Vm. Therefore, the clamping circuit does not alter the wave shape, it only changes the DC level.
    • When the peak value of the input signal increases, the capacitor charges through the forward-biased diode again to the new larger value and when the peak value of the input signal decreases, it discharges through R to the new lower value.

  • Draw the circuit of a positive clamper circuit?

    Figure below shows a positive clamper circuit.

    Positive clamper circuit

  • Draw the output waveform for a positive clamper circuit when an input sinusoidal waveform is applied to it?

    Output waveform along with the sinusoidal input is shown in figure below. Output waveform along with the sinusoidal input is shown in figure below.

    Input-output waveforms for a positive clamper circuit

    The circuit functions in the same way as the negative clamper circuit except that the capacitor would charge to –Vm during the first negative half cycle when the diode gets forward-biased. Negative peaks are clamped to zero as for all negative peaks of the input waveform, the output (vo) given by algebraic sum of vi and vc will be zero.

  • Explain the importance of resistor R in a clamping circuit?

    In the absence of R, the capacitor will be forced to discharge through the reverse-biased diode resistance (Rr) which may be as large as 100 M. Therefore, if the input signal decreases for a negative clamper and increases for a positive clamper, then it may take a long time (may be seconds) before the capacitor discharges to new value and the output again clamped to the desired voltage.So, value of R is chosen to be much smaller than Rr so that this problem is not encountered and the clamping is restored within a few cycles of the input waveform at the most even after the input undergoes a step change in peak amplitude.

  • What are the optimum values of R and C for the clamping circuit?

    The optimum value of R is given by geometric mean of Rf and Rr. That is,

    The time constant of the discharge circuit should at least be 100 times the reverse-biased time period. It is more appropriate to choose C to meet extremely slow discharge requirement rather than fast charging requirement through Rf. Rf is usually so small that C chosen by the discharge criterion almost always satisfies the charge criterion.

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